1. Field of the Invention
The disclosure relates in general to a conductive bridge resistive memory device and method of manufacturing the same, particularly to a conductive bridge resistive memory device which reduces the defects generating from the high electrical field and improve device performance.
2. Description of the Related Art
Programmable Metallization Cell (PMC) technology for resistive switching is being investigated for use in nonvolatile memory, reconfigurable logic, and other switching applications due to its low current, good scalability, and high programming speed. The resistance switching of PMC devices is manifested by growing and removing conducting bridges through an electrochemical or electrolytic process. Therefore, PCM devices have also been referred to as conducting bridge (CB) devices or electro-chemical EC devices.
Conductive bridge resistive RAM (CB ReRAM) has drawn much interest recently because of its high On-Off ratio, high speed, and good scalability. Please refer to FIG. 1A, FIG. 1B and FIG. 1C. FIG. 1A illustrates a typical resistance switching characteristics of the conductive bridge ReRAM. FIG. 1B is sketch of a SET operation of a CB ReRAM cell based on the electrochemical growth process. FIG. 1C is a sketch of a RESET operation of a CB ReRAM cell based on the electrochemical disruption process. The CB ReRAM cell, as shown in FIG. 1B and FIG. 1C, at least includes a bottom electrode 12, a memory layer 14 (such as silicon dioxide, SiO2) and an ion supplying layer 16 formed on the memory layer 14. The ion supplying layer 16 of chalcogenide, such as Ge2Se2Te5 (GST) includes a source of metal ions such as copper. The copper reacts with the chalcogenide to form a Cu-GST compound which could rapidly release copper cations. In SET operation, a bias is applied to the cell which causes the copper cations to migrate into the memory layer 14 and form the conducting filaments (CF) by a process like electro-deposition. When the conducting filaments have grown sufficiently to contact the memory layer 14, a low resistance state (LRS) is achieved. In RESET operation, the cell is reversed biased causing the copper in the conducting filaments (CF) to dissolve in the memory layer 14 and diffuse back to the ion supplying layer 16. When the conducting filaments (CF) are broken, the high resistance state (HRS) is restored. The typical resistance switching characteristics of the CB ReRAM are carried out by electrolytic reactions that form (SET) and disrupt (RESET) the conductive filaments (CF) in the memory layer 14, respectively denoted as LRS and HRS.
However, as the SET/RESET cycling continues the leakage current of the memory layer 14 becomes detectable and can be as high as several tens of microampere even after a strong RESET by DC sweep. FIG. 2 is I-V characteristics showing that the HRS leakage current monotonically increases with the cycling times. Thus, it is one of important goals to solve the problem of current leakage.